Language Breakdown
Lines of code distribution across 5 owned repositories
I-Shaped Developer
I-shapedSpecialist — deep expertise in Verilog
Collaboration Network
Global Impact visualization
Repos
23
PRs
0
Growth
+18%
Top Collaborators
No collaborator data yet.
Coding Streak
Contribution activity over the past year
Rithanathith
@rithan2001
Kunal Ghosh
@kunalg123
Shivam Potdar
@shivampotdar
Steve Hoover
@stevehoover
Akil M
@akilm
Top Repositories
Implementing a cascaded SVM on FPGA
Implementing ORB Feature detection algorithm on RISC-V Core
Musical notes generated using PWM in Atmega 328p Microcontroller
RISC-V CPU Core (RV32IM)
riscv_myth_workshop_jun21-GauravSingh789 created by GitHub Classroom
PicoRV32 - A Size-Optimized RISC-V CPU
Flexible and powerful data analysis / manipulation library for Python, providing labeled data structures similar to R data.frame objects, statistical functions, and much more
E-Yantra 2019-20. Theme : Supply Bot
RTC (Real Time Clock) module interfaced with Atmega 328p micro-controller.
Open Source Impact
Contributions to external projects
No external contributions found.